1. A unique, explicit identification of a memory location, a peripheral device, or a location within a peripheral device. 2. A precise memory location that is an actual address number rather than an expression from which the address can be calculated.

One of two modes of execution for an application on UNICOS/mp systems; the other mode is flexible mode. Applications running in accelerated mode perform in a predictable period of processor time, though their wall clock time may vary depending on I/O usage, network use, and/or whether any oversubscription occurs on the relevant nodes. Due to the characteristics of the memory address space, accelerated applications must run on logically contiguous nodes. See also flexible mode.

The fabric components in a present topology that the administrator accepts for logical topology planning.

An attribute of a node, mostly controlled by administrators, that determines whether end users can log in or submit jobs to the node, depending on the partition’s attributes. The access control attribute of a partition also affects end-user access.

An attribute of a partition, controlled by administrators, that determines whether end users can log in or submit jobs to the partition, depending on the partition’s characteristics. The access control attribute of a node also affects end-user access.

An extension to the normal file discretionary access control. ACLs support the ability to grant or deny access to a file on any user and/or group basis.

Configuration information that the Active Manager software maintains to control which Linux groups can access the Cray XD1 system. Groups are granted access either to the entire system (administrator privileges) or to one or more partitions.

A user action on an alarm to indicate that the user is aware of the alarm. The user can choose to filter acknowledged alarms out of an alarm list.

In the Active Manager GUI, a simple function that a user performs by clicking a button in the workspace of a page.

A point in a program at which a breakpoint, evaluation point, or event point has been set during a debugger session.

The state of an alarm when the condition that triggered it still exists.

The software that monitors and manages all aspects of the Cray XD1 system. Its user interfaces provide administrators and end users with a single point of control for the system.

The relational database in which the Active Manager software stores information necessary to manage the Cray XD1 system.

A component of the Active Manager architecture; a J2EE-based application server that runs on one or more nodes. The Active Manager server implements the Active Manager business logic.

A Cray XD1 node that is allocated to a partition and is currently booted.

In SHMEM, a set that is defined to participate in a collective operation.

A user of the Cray XD1 system with unlimited access privileges, including permission to issue all Active Manager commands. The administrator is responsible for monitoring and managing the system.

The browser-based Active Manager GUI for Cray XD1 administrators. It presents the full set of GUI capabilities, in contrast with the User Portal.

A type of component of the Active Manager architecture; a lightweight remote worker that communicates with the Active Manager server to monitor or control one aspect of the system. Some agents run on every node in the Cray XD1 system.

An Active Manager process that launches agents as necessary on a node.

For Cray X1 series systems, the description of the cabinet that uses a combination of Fluorinert liquid and forced air to cool the components on a compute module. The Fluorinert is air cooled within a heat exchange unit so that a chilled water supply is not required for AC Cray X1 series systems. An AC cabinet uses two blowers: one for the forced air cooling in the module cabinet, and the second for the Fluorinert heat exchange unit.

A record that the Cray XD1 system generates when a monitored attribute meets the condition specified in an alarm definition.

An Active Manager object that specifies the condition on a monitored attribute that generates an alarm. The Cray XD1 system has a default set of alarm definitions, and an administrator can create additional definitions.

A Cray XD1 node that is assigned to a partition. Its working software image is based on the master software image for the partition.

A software package in the Cray XD1 software distribution that includes 3 mathematical libraries: Basic Linear Algebra Subprograms (BLAS), Fast Fourier Transform (FFT), and Linear Algebra Package (LAPACK). Routines are available for both Fortran 77 and C interfaces.

See FPGA application acceleration processor.

The components of the Active Manager software that run on nodes: the Active Manager server and associated components.

For UNICOS/mp systems, a node that is used to run user applications. Application nodes are best suited for executing parallel applications and are managed by the strong application placement scheduling and gang scheduling mechanism Psched. See also node; node flavor.

The major unit of distribution of software for the Cray XD1 system. It contains HPC-optimized Linux, the Active Manager software, the FPGA logic design framework and sample FPGA logic, and any third-party applications bundled by Cray. The application release package consists of RPM packages.

Applications launched via the aprun or mpirun command create an ApTeam of processes. An ApTeam can be a single execution thread or a large number of processes and can use shared memory, distributed memory, or a hybrid model for parallel execution.

See array syntax statement.

A Fortran statement that allows you to use the array name (or the array name with a section subscript) to specify actions on all the elements of an array (or array section) without using DO loops. For example, the A = B array syntax statement assigns all the values of array A to array B. Sometimes called an array assignment statement.

The set of information used in Fortran to alter the details of a Fortran connection. This information includes a list of unit numbers, file names, and file name patterns that have attributes associated with them. Any file name, file name pattern, or unit number to which assign options are attached is called an assign object. When the unit or file is opened from Fortran, the options are used to set up the properties of the connection.

In Fortran, a dummy or pointer array whose last dimension is of an unknown size (specified as *) that is assumed to be large enough for all references made to the array.

I/O operation during which the program performs other operations that do not involve the data in the I/O operation. Control is returned to the calling program after the I/O is initiated. The program may perform calculations unrelated to the previous I/O request, or it may issue another unrelated I/O request while waiting for the first I/O request to complete. An operation is complete when all data has been moved.

Making a remote file system accessible (using NFS) when the file system is accessed.

A node that is physically capable of becoming the master node and is configured to store a periodically synchronized copy of the Active Manager data stores. The administrator can quickly put such a node into service as the master node if the current master node fails or is taken out of service. The enrollment of any node as a backup node is optional; the administrator can enroll one or more suitable nodes, or none.

An obstacle within a program that provides a mechanism for synchronizing tasks. When a task encounters a barrier, it must wait until all specified tasks reach the barrier.

In code, a barrier is used after a phase. The barrier delays the streams that were executing parallel operations in the phase until all the streams from the phase reach the barrier. Once all the streams reach the barrier, the streams begin work on the next phase.

1. An event initiated by software that prevents cooperating tasks from continuing to issue new program instructions until all of the tasks have reached the same point in the program. 2. A feature that uses a barrier to synchronize the processors within a partition. All processors must reach the barrier before they can continue the program.

The starting absolute address of the memory field that is assigned to the user's job. This address is maintained in the base address register. A base address is loaded into a register and used as a starting point from which instructions form addresses. The operating system assigns the absolute starting address to a program. In Cray systems, there are two registers: a database address register, which is used as the starting point for data memory references, and an instruction base address register, which is used as the starting point for instruction fetches.

A section of a program that does not cross any conditional branches, loop boundaries, or other transfers of control. There is a single entry point and a single exit point. Many compiler optimizations occur within basic blocks.

A version of the UNIX operating system developed at the University of California at Berkeley; for example, 4.2BSD and 4.3BSD.

A file format that describes blocked, nontranslatable data.

An ordered sequence of characters that can transparently record internal data. Data read in from a binary stream equals data that was written earlier out to that stream under the same implementation.

The way in which one component in a resource specification is related to another component.

1) A field-replaceable physical entity. A Cray XT service blade consists of AMD Opteron sockets, memory, Cray SeaStar chips, PCI-X or PCIe cards, and a blade control processor. A Cray XT compute blade consists of AMD Opteron sockets, memory, Cray SeaStar chips, and a blade control processor. A Cray X2 compute blade consists of eight Cray X2 chips (CPU and network access links), two voltage regulator modules (VRM) per CPU, 32 memory daughter cards, a blade controller for supervision, and a back panel connector. 2) From a system management perspective, a logical grouping of nodes and blade control processor that monitors the nodes on that blade.

A microprocessor on a blade that communicates with a cabinet control processor through the HSS network to monitor and control the nodes on the blade. See also blade, L0 controller, Hardware Supervisory System (HSS).

A type of Fortran program unit. A block data program unit contains only data definitions. It specifies initial values for a restricted set of data objects.

Method of thread execution used by the compiler where contiguous blocks of loop iterations are divided equally and assigned to available streams. For example, if there are 100 loop iterations and 10 streams, the compiler assigns 10 iterations to each stream. The advantage to this method is that data in registers can be reused across adjacent iterations rather than releasing a stream after each iteration.

A special file that provides an interface to a device that is capable of supporting a file system.

A command that waits for the requested function to complete before it terminates. Most Active Manager commands are blocking, but a few that perform lengthy functions offer a nonblocking option.

An optimization that involves changing the iteration order of loops that access large arrays so that groups of array elements are processed as many times as possible while they reside in cache.

The node from which the UNICOS/mp operating system is or can be booted; typically an OS node. See also node; OS node; system node.

A unit of distribution of embedded software for the Cray XD1 system. It contains firmware components that are installed only at the factory and one field-installable component called DAMON.

A point in a program that, when reached, triggers some special behavior useful to the process of debugging; generally, breakpoints are used to either pause program execution and/or dump the values of some or all of the program variables. Breakpoints may be part of the program itself, or they may be set by the programmer as part of an interactive session with a debugging tool for scrutinizing the execution of the program.

A Cray X1 series hardware term for four grouped compute modules. On the Cray X1 series mainframe cabinet, a brick is designated as either V or W. See also brick-pair; compute module.

For Cray X1 series systems, a component of a brick in the mainframe that includes the Fluorinert pump, filters, the reservoir/heat exchanger unit, supply and return manifolds, and a Cray L1 controller.

For Cray X1 series systems, two bricks (the space required for 8 compute modules) in the front or back half (V-side or W-side for notational reference) of a liquid-cooled Cray X1 series mainframe cabinet. Air-cooled Cray X1 series systems have only the V-side brick. See also brick; compute module.

For Cray X1 series and Cray X2 systems, the part of the C and C++ Programming Environment that translates C and C++ programs, respectively, into object files. The cc (C compiler), CC (C++ compiler), c89 (POSIX 1003.2-1992), and cpp (preprocesssor only) commands work with the C and C++ compilers.

A Fortran feature that allows Fortran programs to call C functions and access C global objects and also allows C programs to call Fortran procedures and access Fortran global objects.

A Fortran feature that allows Fortran programs to call C functions and access C global objects and also allows C programs to call Fortran procedures and access Fortran global objects.

For Cray X1 series systems, the modular controller component of a RAID subsystem, also called a controller brick. It is located in a PC-20. A C-brick can have multiple associated RAID storage components (S-bricks).

A microprocessor in the cabinet that communicates with the HSS via the HSS network to monitor and control the devices in a system cabinet. See also Hardware Supervisory System (HSS).

The subset of memory that is permitted to be cached. For Cray X1 systems, all the memory on the node where the multistreaming processor (MSP) resides. For Cray X1E systems, the cache domain for an "upper" MSP is the upper half of memory on its node, and the cache domain for a "lower" MSP is the lower half of memory on its node.

A division of cache. Each cache line can hold multiple data items. For Cray X1 series systems, a cache line is 32 bytes, which is the maximum size of a hardware message.

A division of cache. Each cache line can hold multiple data items. For Cray X1 systems, a cache line is 32 bytes, which is the maximum size of a hardware message.

A delay that results from loading data into cache that will not be used before it is evicted, thereby displacing cached data that would have been used.

A chassis on a Cray XT series system. See chassis.

A software stack of functions and subroutines used by the executing program. The functions and subroutines are listed in the opposite order in which they were called. That is, the function at the bottom of the stack is the one currently executing. When function a immediately follows function b in the list, a was called by b.

The operating system kernel developed by Sandia National Laboratories and implemented to run on Cray XT single-core compute nodes. See also Catamount Virtual Node (CVN); compute node.

The Catamount kernel enhanced to run on dual-core Cray XT compute nodes.

Stores current system state information from the event handler. The HSS uses this information to display the system state on the System Management Workstation (SMW). See also Hardware Supervisory System (HSS).

See processor.

A special file that provides an interface to an I/O device. The character interface is used for devices that cannot support a file system and as an alternative interface to devices capable of supporting a file system.

The permanent numeric identifier of a chassis, unique to each Cray XD1 chassis. A chassis ID has a maximum of six decimal digits.

A blade enclosure together with power distribution and four R1 router cards. A chassis houses from one to eight blades (either compute or bridge blades). Cabinets contain chassis or router modules: a compute cabinet contains two chassis; a router cabinet has three chassis and contains a router backplane housing up to 16 router modules.

The physical base unit of a Cray XD1 system. Includes a main board, a maximum of 31 commodity and specialized processors, one or two high-speed switch fabrics, a power supply, and four fans. May also contain a maximum of six SATA disk drives and a maximum of four PCI-X cards. Each Cray XD1 chassis occupies 3 vertical units in a 23-inch cabinet.

The hardware component of a Cray XT cabinet that houses blades. Each cabinet contains three vertically stacked chassis, and each chassis contains eight vertically mounted blades. See also cage.

An external RapidArray switch, required for Cray XD1 systems that have a fat-tree topology.

A group of service nodes of a particular type, such as login or I/O. See also specialization.

A user action on an alarm to indicate that the condition that triggered the alarm no longer exists. Applies only to certain user-defined alarms that the Active Manager software cannot automatically detect as cleared.

The state of an alarm when the Active Manager software or a user action indicates that the condition that triggered the alarm no longer exists.

An alarm record that matches a previously generated alarm to indicate that the previous alarm is cleared.

For a partition: The setting of the access control attribute of a partition that does not permit end users to log in or submit jobs, regardless of the partition's characteristics.
For a node: The setting of the access control attribute of a node that does not permit end users to log in or to submit jobs to the node, regardless of the characteristics of its partition.

CNL is a Cray XT and Cray X2 compute node operating system. CNL provides a set of supported system calls. CNL provides many of the operating system functions available through the service nodes, although some functionality has been removed to improve performance and reduce memory usage by the system.

A syntactic extension to Fortran that offers a method for programming data passing; a data object that is identically allocated on each image and can be directly referenced syntactically by any other image.

The dimensions of a co-array; specified within brackets ([ ]). A co-array specification consists of the local object specification and the co-dimensions specification.

An Active Manager agent that processes telemetry data from multiple monitoring agents.

The set of Active Manager commands that a user can issue from the Linux command line to manage and monitor the Cray XD1 system.

The process by which an administrator or installer prepares a Cray XD1 system or component for use after it is physically installed.

An area of memory, or block, that can be referenced by any program unit. In Fortran, a named common block has a name specified in a Fortran COMMON or TASKCOMMON statement, along with specified names of variables or arrays stored in the block. A blank common block, sometimes referred to as blank common, is declared in the same way but without a name.

A graphical user interface (GUI) for loading software. The cit and setup commands invoke CIT.

One of six circuit boards in a Cray XD1 chassis; contains Opteron processors configured as an SMP, DIMMs, and a RapidArray processor. A compute blade may also have an expansion module.

See blade.

For a Cray X1 series mainframe, the physical, configurable, scalable building block. Each compute module contains either one node with 4 MCMs/4MSPs (Cray X1 modules) or two nodes with 4 MCMs/8MSPs (Cray X1E modules). Sometimes referred to as a node module. See also node.

A node that runs application programs. A compute node performs only computation; system services cannot run on compute nodes. Compute nodes run a specified kernel to support either scalar or vector applications. See also node; service node.

A partition with a disabled login attribute and an enabled job execution attribute. Such a partition is suitable for running computing jobs.

See processing element.

A program that coordinates with yod to allocate processing elements.

Arrays that have the same rank (number of dimensions) and dimension extents and that have the same assigned weight to each dimension.

A variable that is incremented only by a loop-invariant value. For example, in a loop with index J, the statement J = J + K, in which K can be equal to 0, J is a CIV.

A sequence of statements in Fortran that starts with a SELECT CASE, DO, IF, or WHERE statement and ends with the corresponding terminal statement.

An Active Manager agent that issues commands to one component of the system.

An action statement (such as a GO TO, STOP, or RETURN statement or a CASE, DO, or IF construct) that can change the normal execution sequence.

The software program that assembles Cray Assembly Language files into Cray X1 or Cray X2 object files. (The Cray X1 and Cray X2 Assembly Language and the Cray X1 and Cray X2 assembler are both referred to as CAL.) Unlike previous versions of CAL, the Cray X1 and Cray X2 assembler allows for explicit definition of data types as 32-bit or 64-bit and as integer or floating point and uses hexadecimal rather than octal for addresses and displayed machine code. The assembler recognizes a set of pseudoinstructions, macros, micros, and opdef commands and directives.

The Cray Data Virtualization Service (Cray DVS) is a distributed network service that provides compute nodes with transparent access to file systems on the service partition using the Cray high-speed network.

The compiler that translates Fortran source code into executable object files. The Cray Fortran Compiler supports the Fortran language through the Fortran 2003 Standard, ISO/IEC 1539-1:2004, with some exceptions and extensions, as well as selected features of the proposed Fortran 2008 Standard, as described in the Cray Fortran user documentation.

For Cray X1 series systems, a microprocessor, physically located on a Cray L1 controller assembly and connected to a Cray L1 controller, that provides environmental monitoring and protection for the compute module, router module, brick cooling unit (BCU), and I/O drawer (IOD) components.

For Cray X1 series systems, a microprocessor, embedded on a Cray L1 controller assembly, that is used as the maintenance access point to the compute module, router module, brick cooling unit (BCU), and I/O drawer (IOD) components.

For Cray X1 series systems, a hardware assembly that contains both the Cray L1 controller and the Cray L0 controller, which are used to control power, initialize, diagnose, and monitor the state of a module and its surrounding environment. Each compute module, router module, brick cooling unit (BCU), and I/O drawer (IOD) has a Cray L1 controller assembly.

The operating system for Cray XT systems.

A specialized router (gateway) providing IP (Internet Protocol) network connectivity between a supported Cray mainframe and site networks. The CNS also provides Transmission Control Protocol (TCP) assist functionality that can enhance TCP performance in supported Cray systems.

A collection of public-domain software that is an optional product available for certain Cray systems. COS provides options that are either not available in or behave differently than Cray operating system utilities.

See Cray pointer.

A variable whose value is the address of another entity, which is called a pointee. The Cray pointer type statement declares both the pointer and its pointee. The Cray pointee does not have an address until the value of the Cray pointer is defined; the pointee is stored starting at the location specified by the pointer.

A server for the Cray X1 series system that runs the Programming Environment software.

Deprecated term: Software and hardware that implements reliability, availability, and serviceability (RAS) and some system management functions. The CRMS components use a private Ethernet network, not the system interconnection network. See also system interconnection network, Hardware Supervisory System (HSS).

The component of the system interconnection network that provides message routing and communication services. See also system interconnection network.

Software on the Cray Workstation (CWS) that is used for configuring the RAID subsystem.

Nonadvisory directives that allow you to more closely control multistreaming for key loops.

For Cray X1 series systems, the system operation, administration, and maintenance workstation.

The Cray system that combines the single-processor performance and single-shared address space of Cray parallel vector processor (PVP) systems with the highly scalable microprocessor-based architecture that is used in Cray T3E systems. Cray X1 and Cray X1E systems utilize powerful vector processors, shared memory, and a modernized vector instruction set in a highly scalable configuration that provides the computational power required for advanced scientific and engineering applications.

A Cray system that uses Cray X2 compute nodes for user application processing and Cray XT series service nodes for login, network, I/O, and boot functions.

A stand-alone Cray XD1 chassis or multiple chassis that communicate over both the supervisory network and the RapidArray interconnect.

A microprocessor that enables the HSS to monitor and control the devices in a system cabinet. See also Hardware Supervisory System (HSS).

A 64-bit router chip that provides routing and communication services between Cray X2 compute nodes. The YARC interconnect enables systems to be scaled using a fat-tree topology.

Cray's documentation system for accessing and searching Cray books, man pages, and glossary terms from a web browser.

For Cray X1 series systems, the primary high-level tool for identifying opportunities for optimization. CrayPat allows you to perform profiling, sampling, and tracing experiments on an instrumented application and to analyze the results of those experiments; no recompilation is needed to produce the instrumented program. In addition, the CrayPat tool provides access to all hardware performance counters.

Iterations of a loop run on multiple processors.

An online technical-assistance and problem-reporting service for subscribing Cray customers.

An alarm that indicates a fault condition that requires immediate corrective action. A component may be completely out of service or is at immediate risk of going out of service.

A communications switch that provides direct connection between any pair of ports.

A Cray XD1 node that is not managed by the Active Manager software. A custom node resides in a custom partition.

A partition that contains nodes that are not managed by the Active Manager software.

The Cray X1 series system internal Ethernet network that connects the Cray Workstation to the access point to be used by Cray Customer Support for remote access to your Cray Workstation. It requires an Ethernet connection for an ISDN router.

The network that connects Cray Workstations (CWSs) together through a switch. This CWS shared private network exists only when there are multiple CWSs connected to a single Cray X1 series system, due to either partitioning or resiliency.

For Cray X1 series systems, a small, high-speed random-access memory that stores frequently or recently accessed data (data cache). The second level of cache storage for scalar operations, it is located between the registers and the E-cache.

An embedded software component that controls part of the chassis startup process and also provides a "safe-mode" interface for technical support personnel.

Directly attached storage.

Transferring data from one object to another; useful for programming single-program-multiple-data (SPMD) parallel computation. Its chief advantage over message passing is lower latency for data transfers, which leads to better scalability of parallel applications. Data passing can be achieved by using SHMEM library routines or by using co-arrays.

The process by which an administrator or installer prepares a Cray XD1 system for the physical removal of a component or the complete dismantling of the system. This process puts the system or component into a state from which it can be recommissioned, but does not necessarily restore the factory state.

The label used to introduce information about a feature that will not be implemented until a later release.

A technique used by the compiler to determine if any iteration of a loop depends on any other iteration (this is known as a loop-carried dependency).

The name that an administrator assigns to a Cray XD1 chassis. The default designation is the chassis ID. The designation of a chassis usually displays on the second line of its LCD.

Also known as "all-to-all mesh." A switchless multichassis topology in which every Cray XD1 chassis in the system connects to every other chassis. A maximum of 13 chassis can be directly connected in a Cray XD1 system.

A feature of the Cray XD1 system in which the RapidArray interconnect provides high-speed interconnections among all processors in the system, which eliminates the need for slower I/O connection paths.

A technique that allows a peripheral device or a channel to control data transfer in and out of the computer. The data transfers directly to or from storage and bypasses the processor.

I/O operation where the a peripheral device or a channel controls data transfer in and out of the computer. The data transfers directly to or from storage and bypasses the processor.

A circuit board of a Cray XD1 chassis that holds one or two SATA disk drives.

Provides connectors for three disk blades in a Cray XD1 chassis. The disk expansion card is in chassis that do not have the PCI-X expansion card.

An optimization technique that allows an applications program to overlap computation and I/O. The I/O libraries set up two data buffers for I/O requests. During a read, for example, one buffer will be used for I/O while computations take place on data from the other buffer.

Four bytes (32 bits).

A processor that combines two independent execution engines ("cores"), each with its own cache and cache controller, on a single chip.

In OpenMP, an extent that includes both the statements of a lexical extent and the statements of a function that is called from the lexical extent. A dynamic extent is an instance of a region.

In a dynamic schedule, the compiler does not bind iterations to streams at loop startup. Instead, streams compete for each iteration using a shared counter.

In OpenMP, the automatic adjustment of the number of threads between parallel regions. Also known as dynamic threads or the dynamic thread mechanism.

For Cray X1E systems, a local, external cache for the 4 P+ chips in a multichip module (MCM). Each E+ chip contains an upper half and a lower half. Each half communicates with the corresponding half of the P+ chips and the corresponding half of memory. The external cache consists of 4 E+ chips that are mapped to separate quarters of the node's memory. Each E+ chip maintains a working subset of the most recently accessed memory on the node board, resulting in a reduced memory read latency on cached data and a reduced dependency on system memory bandwidth for applications with a high cache hit rate. See also E-cache; E-chip.

For Cray X1 series systems, the first level of cache storage. It is located between node memory and a multistreaming processor (MSP). It is provided by the E-chips (for Cray X1 systems) or E+ chips (for Cray X1E systems) in a multichip module and shared by all processors in an MSP. All data that enters an MSP routes through the E-cache. Scalar, vector, and instruction data can be stored in the E-cache. For Cray X1E systems, the E-cache maintains the same functionality as the X1 E-cache but is organized differently. The E-cache is organized into two logical halves: upper and lower. The upper half caches data from the upper half of module memory and the lower half caches data from the lower half of memory. The 4 upper halves of the P+ chips use the upper half of the cache and the 4 lower halves of the P+ chips use the lower half of the cache. This means that data in the upper half of memory accessed by a P+ lower half is accessed uncached and vice-versa.

For Cray X1 systems, a local, external cache for the four P-chips in a multichip module (MCM). The external cache consists of four E-chips that are mapped to separate quarters of the node's memory. Each E-chip maintains a working subset of the most recently accessed memory on the compute module, resulting in a reduced memory read latency on cached data and a reduced dependency on system memory bandwidth for applications with a high cache hit rate. See also E-cache; E+ chip.

I/O statements where the format provides information that directs the editing between internal representation and the character strings of a record (or sequence of records) in the file.

The amount of real time, as measured by a clock, that passes between the start and termination of a user process. This includes user processing time, operating system time, I/O wait time, and sleep or idle time.

A user of the Cray XD1 system who does not have administrator privileges.

A location in a program or routine at which execution begins. A routine may have several entry points, each serving a different purpose. Linkage between program modules is performed when the linkage editor binds the external references of one group of modules to the entry points of another module.

A variable that stores a string of characters for use by your shell and the processes that execute under the shell. Some environment variables are predefined by the shell, and others are defined by an application or user. Shell-level environment variables let you specify the search path that the shell uses to locate executable files, the shell prompt, and many other characteristics of the operation of your shell. Most environment variables are described in the ENVIRONMENT VARIABLES section of the man page for the affected command.

Optional Cray XD1 hardware that connects to each compute blade; if they are present, a chassis has six expansion modules. The expansion modules provide a node with a second RapidArray processor, two additional Rapid Array links, and an optional application acceleration processor.

An XML file that specifies the intended physical topology of the RapidArray interconnect. The Active Manager software uses an expected topology file to verify the present or accepted topology. The file lists all the Cray XD1 chassis, switch chassis, and external RapidArray links in the system. An expected topology file may be a template, which uses logical IDs to identify chassis, or a physical topology file that uses hardware IDs to identify specific chassis. The system includes expected topology templates for standard system configurations.

In CrayPat, a predefined entity that specifies what performance data to collect.

One classification of CrayPat experiments that defines how an instrumented program collects data. The types are trace and sampling.

A programming style in which communication is language independent and in which communication occurs through library calls. The message-passing and explicit shared memory programming methods use products such as MPI or SHMEM.

The process by which the user performs calls to subroutines that convert native data to and from foreign data formats.

The opening of a file or a unit when the first reference to a unit number is an OPEN statement without a FILE specifier.

The collection of fabric components that interconnect in the same switching plane. A Cray XD1 system has one or two independently wired, parallel RapidArray fabrics: the main fabric and the optional expansion fabric. These fabrics are also known as fabric X and fabric Y, respectively.

A Cray XD1 hardware entity that is managed by the fabric manager. Fabric components include RapidArray switches, Cray XD1 chassis, switch chassis, RapidArray processors, RapidArray ports, and RapidArray links.

Optional hardware in a Cray XD1 chassis that adds a second RapidArray fabric to the system: provides a second internal 24-port RapidArray switch, 12 additional internal links, and 12 additional external ports for chassis interconnection. The fabric expansion card connects to the main board.

An Active Manager component that manages and monitors the Cray XD1 RapidArray fabric components. There is a single fabric manager in a Cray XD1 system, regardless of whether the system has one or both fabrics.

See path, fabric.

The ability to define and manage alternate paths to a single disk device or part of a disk device.

One of two perforated covers on the front of a Cray XD1 chassis. Both are hinged and can be flipped down to provide access to the fans. The right-side fascia also holds the LCD.

A physical topology that uses a hierarchy of switches to limit latency and achieve good bisection bandwidth in the system. Cray XD1 systems that exceed 13 chassis are configured as a fat tree.

The set of actions that the system performs when an alarm is generated that has a fault response definition linked to it. Also refers to the Active Manager object that records the actions.

An Active Manager object that specifies the actions that the system takes when an alarm of a specific type is generated. The Cray XD1 system has a default set of fault response definitions, and an administrator can create additional definitions.

Optional hardware in a Cray XD1 chassis that plugs into a PCI-X slot to provide a Fibre Channel interface for a device such as a SAN.

A Cray document that communicates technical or procedural information to Cray customers, Cray employees, and third-party service providers about Cray products.

A document that accompanies a field-replaceable unit to provide the instructions for installing the unit.

An integrated circuit that consists of arrays of AND and OR gates (typically thousands) that can be programmed to perform complex functions. The Cray XD1 system has optional FPGAs available for use as application acceleration processors.

A component of the system that a customer can replace at the customer site.

A method of I/O, sometimes called layered I/O, wherein each processing step requests one I/O layer or grouping of layers. A layer refers to the specific type of processing being done. In some cases, the name corresponds directly to the name of one layer. In other cases, however, specifying one layer invokes the routines used to pass the data through multiple layers.

One of two modes of execution for an application on UNICOS/mp systems; the other mode is accelerated mode. Applications running in flexible mode may run on noncontiguous nodes; they perform in a less predictable amount of processor time than applications running in accelerated mode due to the exclusive use of source processor address translation. See also accelerated mode.

A basic compiler optimization that converts operations on constants to simpler forms as these examples show: Operation to fold Folded operation 1 + 2 3 5.0/3.0 + 1.7 3.366... (if the -O fp1 (Fortran) or -h fp1 (C/C++) or greater is used.) sin( 1.3 ) 0.96355818... 3 + n - 4 n - 1

An option on some Active Manager commands; specifies that the command must execute even though it may have disruptive results.

Occurs when processors allocate additional streams to a thread at the point where it is creating new threads for a parallel loop operation.

Data transfer with editing. Formatted I/O can be edit-directed, list-directed, or namelist I/O. If the format identifier is an asterisk, the I/O statement is a list-directed I/O statement. All other format identifiers indicate edit-directed I/O. Formatted I/O should be avoided when I/O performance is important.

A DNS server to which a local server forwards requests to resolve names in specified domains. The recommended configuration in the Cray XD1 system is to configure a server on the site network as a forwarder for all domains outside the Cray XD1 subdomain.

See logical topology.

An FPGA that users can program to accelerate computationally intensive and repetitive algorithms; acts as a co-processor to the Opteron processor. This is an optional component on the expansion module.

Iterations of a loop are run on a single processor.

State of a variable that indicates whether it contains a value (full) or not (empty). Generic read and write operations use this state to determine whether they can perform an operation on the variable. For example, for a writeef operation can only write a value to a variable if the state is empty. After the write operation, it sets the state to full.

Implements user-specified or explicit parallelism by starting new threads. A future is a sequence of code that can be executed by a newly created thread that is running concurrently with other threads in the program. Futures delay the execution of code if the code is using a value that is computed by a future, until the future completes. The thread that spawns the future uses parameters to pass information from the future to the waiting thread, which then executes. In a program, the term future is used as a type qualifier for a synchronization variable or as a keyword for a future statement.

An operation that copies data between remote and local memory or within local memory. A gather is any software operation that copies a set of data that is nonsequential in a remote (or local) processor, usually storing into a sequential (contiguous) area of local processor memory. A scatter copies data from a sequential, contiguous area of local processor memory) into nonsequential locations in a remote (or local) memory.

An operation that copies data between remote and local memory or within local memory. A gather is any software operation that copies a set of data that is nonsequential in a remote (or local) processor, usually storing into a sequential (contiguous) area of local processor memory. A scatter copies data from a sequential, contiguous area of local processor memory) into nonsequential locations in a remote (or local) memory.

Optional hardware in a Cray XD1 chassis that connects to a PCI-X slot to provide Ethernet interfaces for connecting the system to site networks.

The ID used by applications executed in accelerated mode on UNICOS/mp systems. It is used to help translate remote virtual addresses to physical addresses at the destination node. See also accelerated mode.

See implicit communication.

The UNICOS/mp function that manages and allocates resources, including processors and memory.

From The Free Software Foundation, a compiler that supports C, C++, Objective-C, Fortran, and Java code (see http://gcc.gnu.org/ ).

A security feature that divides the power of the superuser into discrete units of privilege called capabilities.

The software that runs on the management processor in each Cray XD1 chassis. It primarily monitors the hardware components of the system and proactively manages the health of the system. It communicates with nodes and with the management processors in other chassis over the supervisory network.

Hardware and software that monitors the hardware components of the system and proactively manages the health of the system. It communicates with nodes and with the management processors over the private Ethernet network. See also system interconnection network.

A signal sent at regular intervals by software to show that it is still active.

For Cray X1 series systems, a cache for the processor in a P-chip (for Cray X1 systems) or in a P+ chip (for Cray X1E systems) that holds instructions that will soon be executed.

For Cray X1 series systems, an interface for two I/O channels on the compute module. I-chips transfer data between the M-chips (memory system) on compute modules and I/O channel adapters (IOCAs) on the I/O bridges (IOBs) on to the I/O devices (front-end I/O or local I/O).

For Cray X1 series systems, a board within an I/O drawer of an I/O chassis that acts as an I/O bridge to convert System Port Channel (SPC) data from/to PCI-X format. (Also known as an IOCA module because it contains two I/O Channel Adapters.)

For Cray X1 series systems, a field programmable gate array, resident on an IOB, that converts proprietary System Port Channel transactions into standard PCI-X bus transactions.

For Cray X1 series systems, the hardware enclosure that contains two I/O boards (IOBs) and a Cray L1 controller assembly. Each I/O drawer supports System Port Channels (SPCs) to the Cray X1 series mainframe cabinet and Fibre Channel connections to I/O devices. (Also known as an I/O module.)

A programming style in which most communication is recognized implicitly by the compiler and run-time libraries from the Fortran source (including directives). The data-sharing and work-sharing programming methods use implicit communication. Also called global addressing or implicit shared memory.

The process by which you declare that a particular file contains foreign data and/or record blocking and then request that the run-time library perform appropriate transformations on the data to make it useful to the program at I/O time.

The opening of a file or a unit when the first reference to a unit number is an I/O statement other than OPEN, CLOSE, INQUIRE, BACKSPACE, ENDFILE, or REWIND.

A variable that is increased or decreased by a fixed amount on each iteration of a loop.

An inductive loop is one which contains no loop-carried dependencies and has the following characteristics: a single entrance at the top of the loop; controlled by an induction variable; and has a single exit that is controlled by comparing the induction variable against an invariant.

The system software components that run on the management processor and programmable components other than nodes: primarily the hardware supervisory subsystem.

The major unit of distribution of embedded software for the Cray XD1 system. It contains software and firmware components for the hardware supervisory subsystem and the compute blades.

The software image that the Active Manager software uses to temporarily boot a node and install the node’s working software image on its local disk.

The unit that retrieves instructions for scalar operations.

See RapidArray interconnect.

Method of executing loop iterations used by the compiler where contiguous iterations are assigned to distinct streams. For example, for a loop with 100 iterations and 10 streams, one stream performs iterations 1, 11, 21,... while another stream performs iterations 2, 12, 22, ..., and so on. This method is typically used for triangular loops because it reduces imbalances. One disadvantage to using this method is that there is loss of data reuse between loop iterations because the stream is released at the end of the iteration.

A rule, such as the ordering of an ordered list or heap, that applies throughout the life of a data structure or procedure. Each change to the data structure must maintain the correctness of the invariant.

A computing task that runs on one processor or multiple processors concurrently. The workload management (WLM) system assigns the requested resources and launches the job.

An attribute of a Cray XD1 partition that indicates whether the WLM system is enabled; inherited by all nodes that are allocated to the partition. If this attribute is enabled, end users can submit jobs to the partition and the WLM system manages the job lifecycle.

A logical group of nodes assigned to a job and allocated from either the interactive or the batch pool of nodes.

Occurs when threads that are forked for a parallel operation finish the operation. As threads finish and drop the streams they are running on, the streams join back together until there is a single stream running the thread.

Optional hardware that provides a communication path to the JTAG port of the FPGA application acceleration processor. This card connects to one of the high-speed I/O slots on the main board of a Cray XD1 chassis. With this card, you can connect a workstation that runs appropriate debugging tools to the FPGA.

Data representation (for example, single precision, double precision). The kind of a type is referred to as a kind parameter or kind type parameter of the type. The kind type parameter KIND indicates the decimal range for the integer type, the decimal precision and exponent range for the real and complex types, and the machine representation method for the character and logical types.

See blade control processor.

See cabinet control processor.

See flexible file I/O (FFIO).

The scope within which a C or C++ directive is on or off and is bounded by the opening curly brace just before the declaration of the directive and the corresponding closing curly brace. Only applicable executable statements within the lexical block are affected as indicated by the directive. The lexical block does not include the statements contained within a procedure that is called from the lexical block.
This example code shows the lexical block for the inline directive:

void Example(void)
{
    #pragma inline  // inline state is active
    ...
    {
       // inline state is
still on?
    }

    {
      #pragma noinline // inline state is now off
       ...
    }
     // inline state
is back on
    ...
}

The scope within which a C or C++ directive is on or off and is bounded by the opening curly brace just before the declaration of the directive and the corresponding closing curly brace. Only applicable executable statements within the lexical block are affected as indicated by the directive. The lexical block does not include the statements contained within a procedure that is called from the lexical block.
This example code shows the lexical block for the inline directive:

void Example(void)
{
    #pragma inline  // inline state is active
    ...
    {
       // inline state is
still on?
    }

    {
      #pragma noinline // inline state is now off
       ...
    }
     // inline state
is back on
    ...
}

In OpenMP, statements that reside within a structured block. See also structured block.

The iterations of a loop do not have loop-carried dependences. The compiler can parallelize this type of loop.

See RapidArray link.